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Layout Intern - Bachelor's Degree

Marvell Semiconductor, Inc.
paid holidays, sick time
United States, California, Santa Clara
5488 Marvell Lane (Show on map)
Sep 16, 2025

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

As an Analog Layout Engineer Intern with Marvell, you'll be working with the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, IPs such as copper PHYs and optical PHYs. You'll be working within a specialized analog layout team that primarily supports networking products. Marvell has the perfect size and scale for you to learn several aspects of engineering that will be new to you, but also have the time and freedom to dive deep into the details of your knowledge and specialization.

What You Can Expect

As an Analog Layout Engineering Intern, you'll collaborate closely with experienced Analog IC Designers. You'll receive a schematic from an Analog IC Designer. Translating schematics into physical layout designs using Cadence Virtuoso and other CAD tools. Then, you run simulations and verifications on the design and refine and debug as needed in concert with the designer, and both of you keep iterating the design until it meets the desired specifications. You will receive training and mentorship as needed in every step of the process.

Each project can last from a couple months to a year and a half. You will be assigned to a project in time of your internship, but may be asked to switch to something else if priorities change. Flexibility is an important part of the job.

You'll meet with the designer you're paired with to share information and work together. Partnership and teamwork is extremely valuable to Marvell. You'll also have routine meetings with your technical mentor when you have questions, as well as the layout team and the project team where you may have to speak to the entire group and update them about your progress. You may have to present a particular issue or solution you've encountered. We are developing brand new cutting-edge technologies here, so we learn new things frequently and share them with our colleagues.

Why intern at Marvell.

At Marvell, interns are valued contributors from day one. You'll gain:

Real-world experience with cutting-edge semiconductor technology.

Mentorship from industry professionals.

Opportunities to collaborate across multidisciplinary and global teams.

A chance to build a solid foundation for a career in analog IC layout design.

What We're Looking For

To be successful in this role, you must:

- Have fundamental understanding of electrical concepts through your current degree coursework in Electrical Engineering (graduate or undergraduate).

- Have some specialized course work in analog design and layout, as part of your Electrical Engineering degree.

- Familiarity with CAD tools used for IC layout design (e.g., Cadence Virtuoso) in order to translate the schematics to layout . You will receive training and mentorship to build your proficiency.

- Have excellent communication skills to give status updates to your team, present to global teams in different time zones, and to share information with many different levels of personnel at Marvell.

Expected Base Pay Range (USD)

26 - 52, $ per hour.

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

For Internship roles, we are proud to offer the following benefits package during the internship - medical, dental and vision coverage, perks and discount programs, wellness & mental health support including coaching and therapy, paid holidays, paid volunteer days and paid sick time. Additional compensation may be available for intern PhD candidates.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.

Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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