New

Physical Design Engineer Intern - Master's Degree

Marvell Semiconductor, Inc.
paid holidays, sick time
United States, Massachusetts, Westborough
Sep 08, 2025
About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Data Center Engineering (DCE) Physical Design team at Marvell is seeking candidates for a Physical Design (PD) intern position. Common projects within DCE range from artificial intelligence and machine learning, to wired and wireless infrastructure, in the latest technology nodes. The team utilizes the latest EDA tools and works through all technical challenges to insure we meet the performance, power, area and manufacturing requirements of the design. This position will involve on-the-job training and mentorship on an active design. The training will cover at least one aspect of PD activities (e.g. Automated Place & Route, Static Timing Analysis, Physical Verification, etc.). It will also include a small project to be completed during the internship period. What You Can Expect Complete scripting assignment(s) to support on-going projects or existing flows. (e.g. script that extracts data from an EDA tool and presents it in a useful format for other team members to use.) Learn a task or set of tasks that a PD engineer would be responsible for owning. (e.g. Take RTL through synthesis, floorplanning, place and route, timing anaylsis/closure, ECO implementation, DRC/LVS clean-up or a subset of these tasks.) Perform tool/flow evaluations. Interact with members of other teams (RTL, Design for Test, architechture, etc.) to gain a better understanding of the overall design flow and the implicaitons for PD. What We're Looking For Candidate must be enrolled in a MS program in Electrical Engineering, Computer Engineering, Computer Science or a related field, with a graduation date in fall of 2026 or spring 2027. Strong programming skills Exposure to scripting languages such as Perl/Python and/or tcl Knowledge of digital logic, circuit design, and/or computer architecture General knowledge or experience with RTL synthesis, floor planning, place and route, and/or static timing analysis is a plus. Strong analysis and problem-solving skills. Out-of-the-box thinking Team player with good verbal and written communication skills. Expected Base Pay Range (USD) 31 - 61, $ per hour. The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements For Internship roles, we are proud to offer the following benefits package during the internship - medical, dental and vision coverage, perks and discount programs, wellness & mental health support including coaching and therapy, paid holidays, paid volunteer days and paid sick time. Additional compensation may be available for intern PhD candidates. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com. #LI-AR2