Mixed-Signal IC Design CAD Support Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

AMD together we advance_

THE ROLE:

This is a unique opportunity for a hardworking and driven Mixed-Signal IC Design CAD Support Engineer with the opportunity to be strong contributor in the IC design team supporting EDA/CAD tools for integrated circuit design flows.

THE PERSON:

AMD is looking for a self-motivated, experienced, detail-oriented engineer with a strong background in CAD/EDA tool support and methodologies within an IC design environment. A strong understanding of Analog/Mixed-Signal design methodologies is required. Experience is also required in analog simulation, parasitic extraction, Cadence design tools, and scripting, preferably including SKILL, Perl, Python, and Linux/Unix.

KEY RESPONSIBILITIES:

• Close interaction and collaboration with Analog Design, Custom Layout, Digital Design, Digital Verification, and Physical Design Engineers
• Provide CAD tool support and methodology training to design team
• Liaise with CAD team to drive improvements
• Implement automation and improvement of design and verification flows
• Support tapeout milestones and manage IP macro releases to design repository

PREFERRED EXPERIENCE:

• Strong knowledge of mixed-signal circuit design and associated design and verification tools, specifically the Cadence Virtuoso Environment, including Spectre/SpectreX simulation environment (Maestro/ADE)
• Hands-on experience with industry standard tools including:
  • Calibre physical verification tools (DRC, LVS, PERC, etc.)
  • Layout parasitic extraction tools (StarRC, ParagonX, etc.)
  • Totem EMIR analysis
  • Synopsys Timing analysis tools (Nanotime, SiliconSmart, etc.)
  • Logical equivalency checking
• Experience with 3D-IC design tools and methodologies
• Strong knowledge of Skill scripting and Linux/Unix environment languages (Python, Perl, TCL, etc.)
• Experience with version control software (e.g., Perforce, IC Manage) is a plus
• Excellent problem solving and debugging skills
• Strong teamwork, collaboration, and communication skills

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in computer engineering/Electrical Engineering

LOCATION:

Rochester, NY, or Austin, TX, or Boxborough, MA

#LI-SL3

At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD's Employee Stock Purchase Plan. You'll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.